Capturing an abstracted model of Xilinx Artix7 using VTR
Contributor: Arash Ahmadian
Symbiflow has already produced a model of Xilinx's Artix7 in VTR, but it only limited to single chip description. The aim of this project is to...
Programming languages
SymbiFlow
A completely FOSS toolchain for FPGAs.
Technologies
CC++fpgaPythonverilogxilinx
Topics
developer toolselectronic design toolsfpgaopen hardwareprogramming languages
- Total projects
- 5
- Years participating
- 3
- Most recent
- 2021
Participation history
Historical projects
Upgrading VTR flow scripts to Python3 and adding new functionality
Contributor: Shad Torrie
The VTR (Verilog-to-routing) project provides an academic open-source CAD flow for FPGAs, combining tools for Synthesis and Logic Optimization...
Support for Partial Reconfiguration Regions in SymbiFlow
Contributor: Andrew Butt
SymbiFlow does not currently support partial reconfiguration regions. Partial reconfiguration regions are crucial to ongoing FPGA research including...
FPGA Routing Management and Optimization
Contributor: Bingran Hu
I will focus on the Vehicle-to-Routing (VTR) component of the SymbiFlow project. Specifically, I will work on improving the existing electronic...
Optimization of VPR File Formats
Contributor: Fahrican Koşar
I propose replacing VPR’s XML reader for the architecture file with a schema-generated one. Furthermore, I propose replacing current rr_graph,...