Simulated memory controller
Contributor: Flavien Solt
Project goal The goal of this project is to devise and implement a simulation-ready memory controller dedicated to benchmarking processor cores...
Open to the core - collaborative engineering for open source silicon and tools
Contributor: Flavien Solt
Project goal The goal of this project is to devise and implement a simulation-ready memory controller dedicated to benchmarking processor cores...
Contributor: Yuichi Sugiyama
Pointer Authentication is a software security primitive that makes it much harder for an attacker to aggravate attacks targeting arbitrary code...
Contributor: Mostafa Saleh
I will implement ARM CMSIS library on PULPino using proposed priority, then i will port the implementation to its DSP core and compare results.
Contributor: nchronas
The upgraded role of cubesats, fueled by technological advances in the aerospace industry, that lower launch costs, has opened access to space for a...
Contributor: Yeonju Ro
Memory access is one of the most important operation done in modern processors thus it plays an important role in implementation of trusted execution...
Contributor: Benjamin Landers
This project aims to support the use of RISC-V in education by providing a simulator to step through assembly programs. This is a similar concept to...
Contributor: diadatp
To introduce open-source IP for components such as an NASTI slave memory mapped DDRx controller.
Contributor: El-Mohr
PULPino is an open-source microcontroller system, based on a small 32-bit RISC-V core. Importing Arduino Libraries to PULPino architecture should...
Contributor: Jeff Rogers
Xv6 is a “simple Unix-like teaching operating system”. It is based on Sixth Edition Unix and written in ANSI C for x86. Its simplicity coupled with...
Contributor: rahulmahadev
This project aims to port OPTEE for a RISC-V based machine by implementing trust-zone mechanisms using minion cores and tagged memory. Also OPTEE...